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Boosting Yield and Increasing Quality with Power-Aware Test and Small Delay Defect Testing
Please join us for an in-depth technical webinar focused on new capabilities in DFTMAX compression and TetraMAX ATPG that efficiently manage tester power and screen hard-to-detect defects.
Synopsys CEO: EDA strives for efficiency in down market
EDA companies will seek more efficiencies in their operations as they try to ride out the global economic recession, an industry executive told a conference here.
A crisis should never go unused and is an opportunity to put incremental changes to one side and think fundamentally about how to change things for the better, to rethink everything for recovery readiness.
UK scientists, ARM, Synopsys work on reliable low power computing systems
Researchers at the University of Southampton's School of Electronics and Computer Science have received a $578,623 funding to develop reliable low power computing systems.
Synopsys MVSIM Adopted for Low Power Verification of STw8500 Mobile SoC Platform
Comprehensive Support for Low Power Techniques and High Level of Accuracy Significantly Improve Bug Detection MOUNTAIN VIEW, Calif.
1st Asia Symposium on Quality Electronic Design Announces Final...
SAN JOSE, Calif. & KUALA LUMPUR, Malaysia -- -- The 1st Asia Symposium on Quality Electronic Design today announced the final program consisting of several keynote speeches by industry leaders and experts from Synopsys, NXP, Cadence Design Systems, University of Tokyo, and Verdant Electronics, tutorials, panel discussion, and over 80 technical ...
Actel, Synopsys extend OEM agreement for FPGA tools
Programmable logic supplier Actel Corp. and EDA vendor Synopsys Inc. announced a multi-year extension of their OEM agreement for FPGA design tools.
Synopsys and TSMC Deliver Accurate Lithography Verification for 28nm Designs
Synopsys, Inc. , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the results of a collaboration with TSMC under TSMC's Unified Design-for-Manufacturing architecture effort.
SMIC and Synopsys Announce the Availability of Reference Flow 4.0
Flow addresses critical low power challenges of 65-nanometer designs with Synopsys' Eclypse Low Power Solution MOUNTAIN VIEW, Calif.
Faster Power/Ground Grid Closure with In-Design Rail Analysis
Overview: Please join our free 45-minute webinar to learn how you can use in-design rail analysis to accelerate the path to final design closure.
PennyStockChaser.com: Synopsys, Inc. (Nasdaq: SNPS) Hot Stock on the Move
PennyStockChaser.com is pleased to offer a hot stock alerts service. Investors can receive FREE Stock Alerts by visiting the following link: http://www.pennystockchaser.com/join-now/ Today's news alerts include: Synopsys and Actel Renew OEM Relationship for FPGA Design Software Technology-Leading FPGA Tools Deliver Highly Optimized Results to ...
Synopsys and Actel Renew OEM Relationship for FPGA Design Software
Synopsys, Inc. , a world leader in software and IP for semiconductor design, verification and manufacturing, and Actel Corporation today announced a multi-year extension of their OEM agreement for FPGA design tools.
Synopsys Continues Galaxy Custom Designer Momentum with 2009.06 Release
Release Brings New Advances in Productivity with Advanced Analog Environment and Schematic Driven Layout MOUNTAIN VIEW, Calif.
Achieving Predictable Success in FPGA Design
Overview: Join Synopsys for this three part webcast for serious FPGA designers. The sessions will introduce you to tools that provide more productive and predictable design and verification techniques.
Synopsys Enables System Design Interoperability With System-Level Catalyst Program
Synopsys, Inc. , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.
Synopsys, MIET prolong cooperation agreement
On October 6, 2006 Synopsys, Inc. , a world leader in semiconductor design software, announced the signing of a Cooperation Agreement establishing a joint educational program at MIET.
"Stocks that Standout" picks for today are: AVAV, QGEN, SNPS
StandoutStocks.com "Stocks that Standout" picks for today are: AeroVironment, Inc.
Synopsys CEO: Crisis will change the way chips are designed
As if the current downturn weren't challenging enough, the semiconductor industry is also headed for increasing challenges from higher design costs and production at smaller geometries, according to Aart de Geus, chairman and CEO of Synopsys Inc.
Synopsys helps Fujitsu cut design cycle by 30pc
Fujitsu Microelectronics deployed Synopsys' Galaxy Implementation Platform for use with its low power digital electronics and mobile application ICs Thursday, June 04, 2009 MOUNTAIN VIEW, USA: Synopsys Inc.
Faster Design Closure with Congestion Minimization
Overview: Routing congestion can cause painful iterations between synthesis and implementation, reducing your productivity and delaying your design closure.